• With GCC one can do inline functions (useful with microcontrollers). http://gcc.gnu.org/onlinedocs/gcc-4.4.0/gcc/Inline.html#Inline . Useful gcc command line: -Winline

• GCC_EXEC_PREFIX . For defining the GCC executables prefix

• Targets without prerequisites are called phony targets (clean target)
• Is standard practice to have an OBJS(or objects) variable to list all the object files.
• There is an implicit rule to make .o files out of .c files: example.o: example.h
• If you have several target depending of the same (not .c) prerequisites you can do: kbd.o command.o files.o : command.h
• A good clean rule. .PHONY tell explicitly that clean is a phony target (in case there is a file called “clean” in the directory). With -rm execution continues even with errors coming out of rm. Ex:

.PHONY : clean
clean :
           -rm edit $(objects)

• Variables are used with $()
• “-” in front of a directive appears to ignore errors.
• MAKEFILES is an environmental variable that tells make to include the makefiles listed there if they exist. Used in recursive invocations of make.
• It seems that Double-colon rules (::) are always executed (updated)
• make -n target will print the commands to update target without executing them.
• $? only files that have change from the list of prerequisites of a rule.
• $^ list of all the prerequisites of a rule.
• $@ target
• $< is only the first prerequisite. Useful when you have also header files as prerequisites but you don't want to put them on the compilation commands.
• A prerequisite can be of the form: -lname. It will look for a file called libname.so and then libname.a
• Wildcards only get automatically expanded in rules for the rest use: $(wildcard pattern…)
• Substitution: $(patsubst %.c,%.o,$(wildcard *.c))
• VPATH contains the search directories. vpath Directive is a search path for files under a pattern

vpath %.h ../headers

• CFLAGS variable is use during the c implicit rule compilation.
• make -C dir specifies the working directory.
• See the phony section in the manual for multiple directory makefiles, and parallel processing
• Trick to generate several programs in the same directory:

all : prog1 prog2 prog3
     .PHONY : all
... rules for programs

• extradeps= takes the argument from make extradeps=foo
• $(objects): %.o: %.c Pattern rules