Differences

This shows you the differences between two versions of the page.

--- programming [2009/06/19 02:33] – memeruiz
+++ programming [2021/02/01 05:55] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
 ====== Programming ======
+[[bash]]
 ===== C =====
   * With GCC one can do inline functions (useful with microcontrollers). [[http://gcc.gnu.org/onlinedocs/gcc-4.4.0/gcc/Inline.html#Inline]] . Useful gcc command line: -Winline
@@ Line 32: / Line 35: @@
   * CFLAGS variable is use during the c implicit rule compilation.
-  * make -C dir specifies the working directory.
+  * make -C dir specifies the working directory. Activates -w for printing "entering directory ..."
   * See the phony section in the manual for multiple directory makefiles, and parallel processing
   * Trick to generate several programs in the same directory:
@@ Line 71: / Line 74: @@
   * Use $(MAKE) instead of make
   * You can export variables to the sub-make with "export variable"
+  * Canned sequences of commands are like functions or macros but is really a variable. You can called from rule commands. syntax:
+  define name
+  cmd
+  cmd
+  ...
+  endef
+  * For avoiding that a target gets an implicit rule use: target: ; An empty command target
+  * = variables are called recursive variables. They do recursive expansion.
+  * := simply expanded variables.
+  * FOO ?= bar , this assignment only happens if FOO hasn't been assigned before.
+  * Substitution references: Is an abbreviation of patsubst
+  foo := a.o b.o c.o
+  bar := $(foo:.o=.c)
+  * Variables in the environment become make variables
+  * To add more text to an existing variable use += . += over a non existing variable acts as = . If the variable existed before it acts according to the type of variable.
+  * define directive is similar to "="
+  * target specific variable assignments.      prog : CFLAGS = -g
+  * pattern specific variable assignments.      %.o : CFLAGS = -O
+  * conditionals :
+  ifeq(variable, value)
+      statements
+  else
+      statements
+  endif
+  * conditionals: ifeq(arg1,arg2) ifneq(arg1,arg2) ifdef(varname) ifndef(varname)
+  * function call.  $(function arguments) . Find functions [[http://www.gnu.org/software/make/manual/make.html#Text-Functions|here]]
+  *      $(foreach var,list,text) is special
+  * $(call variable,param,param,...) creates new parameterized functions
+  * make -p in a directory without Makefile to see all the implicit rules.
+  * n.o is made automatically from n.c with a command of the form `$(CC) -c $(CPPFLAGS) $(CFLAGS)'.
+  * n.o is made automatically from n.s by running the assembler, as. The precise command is `$(AS) $(ASFLAGS)'.
+  * n.s is made automatically from n.S by running the C preprocessor, cpp. The precise command is `$(CPP) $(CPPFLAGS)'.
+  * n is made automatically from n.o by running the linker (usually called ld) via the C compiler. The precise command used is `$(CC) $(LDFLAGS) n.o $(LOADLIBES) $(LDLIBS)'.
+  * Variables used by implicit rules [[http://www.gnu.org/software/make/manual/make.html#Implicit-Variables|here]]
+  * pattern rules contain % in the target
+  * List of automatic variables [[http://www.gnu.org/software/make/manual/make.html#Automatic-Variables|here]]
+  * Canceling implicit rules.      %.o : %.s
+  * study the following commands. Seem to be useful: cat cmp cp diff echo egrep expr false grep install-info ln ls mkdir mv pwd rm rmdir sed sleep sort tar test touch true
+  * Quick reference [[http://www.gnu.org/software/make/manual/make.html#Quick-Reference|here]]
+===== Microcontrollers and GCC =====
+Programming and generating code for a system where Linux is already running usually involves just writing the source code for the program, some libraries and some Makefiles. One thing that is always happening, every time that some code is generated that can be useful to use in a system, is linking. During linking basically the code generated by the compiling process, called object code, from all the source files plus the code from library files gets "linked" in one single output object code in a specific format. This linking process is necessary because the operating system needs the information of how and where to look for code from other "shared libraries", also how to put the code generated in memory and also how to execute this code.  Something I didn't know is that this information on how linking should happen is specified in two ways. First with specific standards and object file types and, second with instructions given to the linker using a linker script file.
+The approach that I follow to deal with this was the following:
+  - Get an example of a project for a microcontroller that requires to set memory layouts by hand, I got an example for the stm32 Arm microcontrollers.
+  - Read the complete GCC users manual. This is important to know what is going on during the whole compilation process.
+  - Read the complete Makefile users manual. This is big but very important. Now I understand much more variations of Makefiles.
+  - Read the complete manual for ld the linker. This is where you will find the information for writing linker scripts.
+You may wander why you don't have to do this in your linux i386 PC computer, this is because there is already a default ld script for your system and it gets used automatically. So you don't notice. But if you dare you can try to write your own ld script for your i386 and try to get your program running with it.